Dynamic switching circuits are designed to operate in two phases, a precharged phase and an evaluate phase. During the precharge phase, nodes within the dynamic circuit are set to predefined voltage levels. During the evaluate phase, the dynamic circuit nodes switch from their precharge state depending on the logic function of the dynamic switching circuit. Dynamic switching circuits are often cascaded together such that the output of one dynamic circuit becomes the input to the logic function of a second dynamic circuit. Each dynamic circuit is precharged in parallel, i.e., at the same time. However, each dynamic circuit evaluates in series. Dynamic circuits cascaded in this fashion are sometimes referred to as domino circuits in that the precharge sets up each dynamic circuit and a first dynamic circuit evaluation sets off a series of evaluations in each succeeding dynamic circuit until a final output is received.
A state of the art dynamic circuit used in such a domino circuit is depicted in FIG. 1. As shown in FIG. 1, each dynamic circuit 10 of a domino circuit requires a precharge input 12 and a logic signal input 14. A precharge control transistor 16 having an on state and an off state is operably coupled to a power supply 17 and a dynamic node 18. Dynamic node 18 is often referred to as a treetop node. Precharge input 12 receives a precharge signal for initiating the precharge phase and controlling charging of dynamic node 18 by setting precharge control transistor 16 into the on state wherein dynamic node 18 is charged by power supply 17. In this manner, precharge control transistor 16 controls charging of dynamic node 18 to a predefined voltage level based upon precharge input 12. Logic signal input 14 receives a logic signal for initiating the evaluate phase and controlling discharge of dynamic node 18. Dynamic circuit 10 further includes a combinational logic circuit 20 operably coupled to dynamic node 18 and ground 19 for controlling the discharge of the voltage from dynamic node 18 to ground 19 based upon the logic signal received by logic signal input 14. In other words, the logic signal either causes or doesn't cause combinational logic 20 to create a path from dynamic node 18 to ground 19. If a path to ground 19 is established from dynamic node 18, then dynamic node 18 discharges to ground 19 which causes dynamic node 18 to assume a low state. If, on the other hand, no path to ground 19 is established through combinational logic 20, then dynamic node 18 retains a high state.
Dynamic circuit 10 further includes a recharge transistor 22 having a conducting state and a non-conducting state and is coupled to power supply 17 and dynamic node 18 for maintaining the voltage at dynamic node 18 at the predefined voltage level. Recharge transistor 22 includes a recharge control input or gate 23 for receiving a recharge control signal that controls recharging of dynamic node 18 by setting recharge transistor 22 into the conducting state wherein dynamic node 18 is recharged by power supply 17. Recharge transistor 22 is used to maintain dynamic node 18 at the predefined voltage level between the start of the precharge phase and the end of the evaluate phase. As will be appreciated, recharge transistor 22 may not be necessary if the time between the start of the precharge phase and the end of the evaluate phase is short. In other words, dynamic node 18 does not have time to leak. Dynamic circuit 10 further comprises an inverter 24 operably coupled to dynamic node 18 and an output node 32. Inverter 24 includes a first transistor 26 and a second transistor 28 configured to form a standard two-transistor inverter as is well known in the art. Output node 32 is directly coupled to recharge control input 23 for delivering the recharge control signal, or voltage at output node 32, to recharge transistor 22. In other words, the voltage at output node 32, is fed back to recharge control input 23 so that recharge transistor 22 is set into its conducting state as the voltage at output node 32 drops. In this manner, dynamic node 18 is recharged by power supply 17. Dynamic circuit 10 may also include a ground interrupt transistor 30 coupled to combinational logic circuit 20 and ground 19 to ensure that no conductive path exists from power supply 17 to ground 19 during the precharge phase. It is well known in the art that ground interrupt transistor 30 can be eliminated if the logic signals fall to ground prior to precharge transistor 16 receiving the precharge signal from precharge input 12.
One of the disadvantages of using a dynamic switching circuit, such as depicted in FIG. 1, is that it consumes more power than a static switching circuit. In fact, power is consumed at every cycle consisting of the precharge phase and evaluate phase. What is needed is a dynamic circuit that saves the power used to precharge the dynamic node for use in a subsequent cycle consisting of another precharge phase and evaluate phase.